VLSI Team Leader
(Haifa, Israel)
Reports To: VLSI Manager
Primary functions:
To lead a VLSI team in a very challenging and complicated project.
Education and Experience:
BSEE/BSCS or higher
At least 5 years experience in logic design using Verilog
Experience leading a team of VLSI Engineers and managing VLSI Projects
Knowledge of tools and methodologies such as Synthesis, STA and DFT
Working experience with automated verification tools like Specman /System Verilog is an advantage
Know-how in video processing/ RISC processors / compression standards is also an advantage
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