CVE5

High Definition Video Encoder

CVE5 encodes YCrCb, 4:2:2 digital video into the 720p, 1080i, 480p and 576p standards. All NTSC, PAL, or SECAM TV standards for interlaced output are also supported. CVE5 supports Vertical Blanking Interval (VBI) encoding, including Closed Captions, Teletext, WSS and CGMS-A encoding.
 

Overview

Zoran’s CVE5 High-Definition Video Encoder is a silicon-efficient, high-quality Intellectual Property Core for video IC designs requiring the high definition TV encoding. CVE5 encodes YCrCb, 4:2:2 digital video into the 720p, 1080i, 480p and 576p standards. All NTSC, PAL, or SECAM TV standards for interlaced output are also supported. CVE5 supports Vertical Blanking Interval (VBI) encoding, including Closed Captions, Teletext, WSS and CGMS-A encoding. CVE5 also includes support for Macrovision 7.1.L1, the copy protection scheme used in DVD players and set-top boxes. Six separate output busses for Y, Composite, Chroma, and RGB provide for flexibility in connection and multiplexing to DACs.

The CVE5 High-Defintion video encoder greatly reduces the risk and time involved when integrating this function into an IC. When combined with Zoran’s Frame-It-1 Video Deinterlacer, CVE5 provides a superior quality solution for high definition video encoding.

Deliverables

  •  Compilable Verilog source code
  •  Bit-accurate, cycle-accurate C model
  •  Synopsis synthesis scripts
  •  Test input files
  •  Documentation

  • Features

  • 720p, 1080i, 480p and 576p standards supported
  • Encodes 4:2:2 YCrCb into all variations of NTSC, PAL or SECAM interlaced TV standards for interlaced output
  • Simultaneous output of composite video, S-Video and component video supported
  • Dual chroma paths for optimal output of both composite video and S-Video component video
  • CCIR 601, 604 and 656 and SMPTE 253 standards supported
  • Supports Macrovision 7.1.L1 copy protection
  • 47-tap luma filter
  • Outputs 10-bit data to DACs
  • Vertical Blanking Interval (VBI) encoding support
  • Closed Captions, Teletext, WSS & CGMS encoding
  • Uniform 54 MHz clock
  • Fully synchronous design
  • 4x oversampling of luminance and chrominance filter for interlace mode
  • 2x oversampling for progressive scan mode
  • Process technology independed ‘softcore’
  • CVE5 Block Diagram

    CVE5 Block Diagram (GIF)