Quatro 4200 Family

Programmable SOC Solution for Printers and All-in-Ones

Building upon the cost-effective 4100, the 4200 family adds new processing and connectivity features. This enables a lower BOM cost as well as the addition of valuable new product features. Like the Quatro 4100, the 4200 family integrates two proven processors, the ARM7 RISC CPU core and Zoran’s Quatro SIMD DSP core, providing OEMs with an easily programmable and inexpensive controller platform.
 

The Quatro 4200 family is ideal for applications that require one or more PCindependent functions such as color inkjet AIOs, monochrome and color laser AIOs, and direct-connect photo printers with Hi-Speed USB or memory card interfaces.

Benefits

Cost-effective solution Highly integrated system-on-a-chip with both PC and non-PC interfaces, enabling the lowest possible cost Rapid time-to-market Programmable platform for rapidly deploying innovative features and associated image processing pipelines

High performance Specialized imaging DSP core paired with the industry-leading ARM7 CPU core

Three series tailored to the needs of specific segments

  • 4200 for AIOs and photo printers with memory card and character LCDs
  • 4201 for advanced photo-AIOs with LCD interfaces and expanded
  • connectivity
  • 4202 for advanced photo printers that do not require scanning
  • Entry-Level Print Appliances

    The entry-level segments within the market for print appliances AIOs and direct-connect photo printers are growing dramatically. Driving this growth are lower prices, innovative features, and the proliferation of image-rich content from digital cameras, scanned documents, and the Web. The 4200 family is designed to address the aggressive cost requirements of these segments. Through its full programmability, the 4200 family allows OEMs to rapidly bring products to market and with more innovative features, including graphical LCD displays, fax, and high-speed USB camera docks.

    Programmable Platform

    The 4200 family is a highly integrated SOC solution for appliance printers that OEMs can program to implement the features and associated image processing required across a range of products. Because it is programmable, the 4200 family offers OEMs both significant time-to-market advantages and differentiation over conventional ASIC solutions.

    Quatro Architecture

    The 4200 family is based on a scalable, extensible platform for constructing programmable SOC solutions in imaging and printing devices. At the heart of the architecture are four key elements:

  • ARM 32-bit RISC CPU core
  • Quatro 4-datapath SIMD DSP core
  • Industry-standard internal bus
  • Easy-to-use C-based programming environment
  • By pairing the ARM CPU core with the Quatro DSP core, the Quatro solution provides OEMs with a unique combination of high performance processing and easy-to-use programmability. The ARM CPU core, the established leader in embedded CPU cores, delivers high performance system and control processing with dense code size and a highly regarded software development tool suite. The 4200 family Quatro DSP core builds on 6 generations and 10 years of Zoran Quatro DSP technology. The 4-datapath parallel processing Single Instruction, Multiple Data (SIMD) architecture is specifically tailored for imaging applications, delivering unmatched performance. The Quatro DSP offers up to 530 million multiplyaccumulates (MACs) per second at 133 MHz, allowing new imaging features to be quickly implemented without changing hardware, enabling rapid time-to-market and minimizing development expense.

    Programming Environment

    The programming environment for the 4200 family is based on the ARM RealView Developer Suite, widely recognized as one of the best embedded development tool sets available. To these proven ARM tools Zoran integrates a set of tools for programming the Quatro DSP-C compiler assembler, simulator, debugger, and libraries. Using the ARM CPU and Quatro DSP simulators, an OEM’s complete system-both system functions and image processing pipelines-can be fully developed and simulated on a PC. Zoran’s extensive library of optimized image processing algorithms makes developing image processing pipelines easy.

    Reference Design

    To further shorten time-to-market, Zoran provides OEMs with a reference design for an inkjet AIO. The reference design includes both a controller board and firmware. The reference controller board also serves as a development board that OEMs can use to prototype their own system code.

    Key Features

  • 67 MHz ARM7 CPU core
  • 133 MHz quad-processor SIMD DSP core
  • Integrated 16-bit scanner AFE
  • USB 2.0 Hi-Speed device (480 Mbps)
  • USB 2.0 Hi-Speed host (480 Mbps) for camera direct-connect or peripheral connect
  • Memory card interfaces
  • Graphical LCD interface
  • NTSC/PAL video output
  • Programmable interfaces to control inkjet and dye-sub print heads, laser engines, and scanner assemblies
  • Copies 8.5" x 11" photos in 40 seconds at 600 dpi
  • Complete development tool suite
  • Complete reference design
  • Compatible with code bases developed for other Quatro SOCs
  • Extensive image processing library
  • Processing Modules

  • 67 MHz ARM7 32-bit RISC CPU core
  • 133 MHz Quatro 4-datapath SIMD DSP core
  • 133 MHz JBIG compression/decompression core
  • 133 MHz JPEG assist module
  • Interfaces Modules

  • 133 MHz 8-bit or 16-bit SDRAM interface
  • USB 2.0 Hi-Speed (480 Mbps) device interface (including PHY)
  • USB 2.0 Hi-Speed (480 Mbps) and Full-Speed (12 Mbps) hosts
  • Memory card interface: CompactFlash (including Microdrive), Memory Stick, Memory Stick PRO, Secure Digital, xD-Picture Card, MultiMediaCard, and SmartMedia
  • Integrated 16-bit scanner AFE supporting CCD and CIS scanners
  • Powerful programmable printer and scanner mechanism control interface with dual 133 MHz 8-bit flexRISC processors
  • 15-channel, 3MHz 10-bit A/D
  • System bus interface
  • General-purpose I/O interface
  • Serial port
  • JTAG interface
  • NTSC/PAL video output
  • Graphical LCD interface
  • Key Specifications

  • 216-pin LQFP or 292-pin BGA package
  • 0.18 micron process
  • On-chip PLL with EMI reduction
  • Full scan design and on-chip memory BIST for high production test coverage
  • Core voltage 1.8V
  • I/O voltage 3.3V (5V tolerant)
  • Power dissipation 2W
  • Sleep mode
  • Quatro 4200 Family Architecture

    Quatro 4200 Family Architecture (GIF)

    Quatro 4200 Family Block Diagram

    Quatro 4200 Family Block Diagram (GIF)