Quatro 4305 & 4310 Family

The Quatro® 4305 solution includes all the features required for enabling OEMs to bring low-cost, monochrome and color printer products to market.

The Quatro® 4310 processor targets MFPs and scanners and is a cost-effective platform with the processing power required to run Zoran’s print language interpreter firmware, IPS™.

 

Description

Each Quatro® 4305 & 4310 solution embeds a high-performance ARM9 CPU for processing page description languages (PDLs)and a Quatro SIMD DSP core for acceleration, providing OEMs with the compelling combination of integration and performance.

Laser Printers and MFPs

The market for laser printers and MFPs continues to grow rapidly. Driving this growth are lower prices, innovative features, and the proliferation of image-rich content from digital cameras, scanned documents, and the Web. Increasingly, all but the simplest entry level products now require sophisticated features, including color LCDs, and sophisticated image processing functions The 4305 and 4310 answers the need for these sophisticated feature requirements at very low cost. With full programmability and fast processing performance, the 4305 and 4310 provides OEMs with a flexible and cost-effective platform for implementing differentiated products.

Programmable Platform

The 4305 and 4310 is a highly integrated SOC solution for low cost laser printers that OEMs can program to implement the features and associated image processing required across a range of products. Because it is programmable, the 4305 and 4310 offers OEMs both significant time-to-market advantages and differentiation over conventional ASIC solutions.

By pairing the ARM CPU core with the Quatro DSP imaging core, the Quatro solution provides OEMs with a unique combination of high performance processing and easy-to-use programmability. The ARM CPU core, the established leader in embedded CPU cores, delivers high performance system and control processing with dense code size and a highly regarded software development tool suite.

The 4305 and 4310 Quatro DSP core builds on over 10 years of Zoran Quatro DSP technology. The 4-datapath parallel processing Single Instruction, Multiple Data (SIMD) architecture is specifically tailored for imaging applications, delivering unmatched performance.

The Quatro DSP offers up to 1.2 billion multiply-accumulates (MACs) per second at 300 MHz, allowing new imaging features to be quickly implemented without changing hardware, enabling rapid time-to-market and minimizing development expense.

Programming Environment

The programming environment for the 4305 and 4310 is based on the ARM RealView Developer Suite, widely recognized as one of the best embedded development tool sets available. To these proven ARM tools Zoran integrates a set of tools for programming the Quatro DSP-C compiler assembler, simulator, debugger, and libraries. Zoran’s extensive library of optimized image processing algorithms makes developing image processing pipelines easy.

Reference Design

To further shorten time-to-market, Zoran provides OEMs with a reference design for a color laser MFP. The reference design includes both a controller board and firmware. The reference controller board also serves as a development board that OEMs can use to prototype their own system code.

Benefits

Cost-effective solution - Highly integrated system-on-a-chip with both PC and non-PC interfaces, enabling the lowest possible cost

Rapid time-to-market - Programmable platform for rapidly deploying innovative features, associated image processing pipelines and new mechanisms

High performance - Quatro DSP image processing core paired with the industry-leading ARM9 CPU core

Two series tailored to the needs of specific segments:

  • 4305 series for color and monochrome printers
    • Quatro 4305/300 - 300 MHz print only solution
    • Quatro 4305/150 - 150 MHz print only solution
  • 4310 series for color and monochrome MFPs and scanners
    • Quatro 4310/300 - 300 MHz MFP/scanner solution
    • Quatro 4310/220 - 220 MHz MFP/scanner solution

Key Features

  • High Performance 32-bit ARM9 CPU core
  • Quatro 4-datapath SIMD DSP core
  • Dedicated JBIG processing core
  • Integrated 16-bit scanner AFE (Quatro 4310 only)
  • USB 2.0 Hi-Speed device and host interfaces
  • Integrated 10/100 Ethernet MAC
  • Integrated laser clock generator and synchronization circuitry supporting multi-pass and tandem laser engines
  • Memory Card interfaces
  • Graphical LCD interface
  • Integrated ADC (3 MHz, 10-bit, 12 channels)
  • Integrated Real Time Clock
  • Complete development tool suite and reference design
  • Compatible with code bases developed for other Quatro SOCs
  • Extensive image processing library
  • Quatro Architecture

    The 4305 and 4310 is based on a scalable, extensible platform for constructing programmable SOC solutions in imaging and printing devices. At the heart of the architecture are four key elements:
  • ARM 32-bit RISC CPU core
  • Quatro 4-datapath SIMD DSP image processing core
  • Industry-standard internal bus
  • Easy-to-use C-based programming environment
  • Processing Modules

  • ARM926 32-bit RISC CPU core with Memory Management Unit
  • Quatro 4-datapath SIMD DSP core
  • JBIG compression/decompression core
  • PEG assist module
  • Interface Modules

  • DDR1/DDR2-DRAM interface
  • USB 2.0 Hi-Speed (480 Mbps) device interface (including PHY)
  • USB 2.0 Hi-Speed (480 Mbps) 3-port host interface (including PHY)
  • Memory card interface: CompactFlash (including Microdrive), Memory Stick, Memory Stick PRO, Secure Digital, xD-Picture Card, MultiMediaCard, and SmartMedia
  • Integrated 25MSPS 16-bit scanner AFE supporting CCD and CIS scanners (4310 only)
  • Programmable scanner mechanism control interface with 300 MHz 8-bit flexRISC processor (4310 only)
  • Programmable printer mechanism control interface with 300 MHz 8-bit flexRISC processor
  • 12-channel, 3MHz 10-bit A/D converter
  • System bus interface
  • General-purpose I/O interface
  • Serial ports
  • JTAG interface
  • 10/100 Ethernet MAC
  • Graphical LCD interface
  • Key Specifications

  • 352-pin and 296-pin BGA packages
  • 80nm process
  • On-chip PLL with EMI reduction
  • Full scan design and on-chip memory BIST for high production test coverage
  • Core voltage 1.0V
  • I/O voltage 2.5V and 3.3V
  • Power dissipation <3.0W @ 300MHz
  • Sleep mode
  • Quatro Architecture

    Quatro Architecture (JPG)