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Quatro 4500 Family

Programmable SOC Solution

Overview

Overview

The dual-core SOCs in the Quatro® 4500 family integrate multicore CPU technology, a key advancement in achieving high processing speeds while minimizing cost and power consumption. They combine a 400 to 600 MHz ARM11MP dual-core CPU with Level 1 and Level 2 caches to provide fast processing of Zoran’s multicore-optimized IPS print language interpreters, enabling printing at speeds in excess of 45 color pages per minute.

The 4500 family provides high-speed scan and copy processing through the combination of a hardware image processing pipeline and four programmable Quatro® digital signal processors (DSPs). The 4500 also provides advanced networking features including Gigabit Ethernet, IPv6, and IPsec, which are quickly becoming must-have features in many enterprise and government organizations.

The 4500 family together with the lower end 4305/4310 family offer solutions that span the full range of desktop office scanning, copying and printing devices.

Benefits

Cost-effective solution—High level of integration including printer, scanner, USB, Gigabit Ethernet, and PCI Express interfaces

Fast time-to-market—Programmable platform for deploying innovative features and associated image processing pipelines

High performance—Dual-core ARM11MP CPU, 4 imaging DSP’s and hardware image processing for copy and scan functionality

Wide Range of Uses—Printers, MFPs, Mono/Color, Scanners

Key Features

  • Dual-core ARM11MP CPU up to 600 MHz
  • Four quad-processor DSP cores up to 300 MHz
  • Hardware image processing pipeline
  • Level 2 cache and scratchpad memory
  • Scanner interface supporting LVDS inputs
  • Programmable printer interface for multipass and tandem print engines
  • Gigabit Ethernet
  • PCI Express

Features

Print Language Processing

PDLs continue to be a key requirement for the office market and help OEMs to meet the stringent interoperability requirements of their customers. The ARM11MP CPU core delivers high-performance system and control processing with industry-leading code density and a high-quality development environment. Combined with Zoran’s multicore enabled IPS™ PDL interpreter firmware, the Quatro® 4500 achieves new levels of PDL printing performance.

Programmable Platform

The 4500 family is a highly programmable processor solution for desktop offi ce printers and MFPs. OEMs can program the platform’s features and associated image processing pipeline as required across a range of products spanning raster and PDL, print-only and MFP, monochrome and color. The 4500’s full programmability offers OEMs significant time-to-market advantages over conventional ASIC solutions.

 

Hardware Image Processing Pipeline

The 4500 family integrates a set of hardware pipeline modules which can be used to implement a full scan or copy pipeline. The hardware pipeline modules may also be augmented by algorithms running on the DSP, in order to maximize performance. The hardware pipeline modules utilize a 1 MB scratchpad memory in order to hold both tables and image data, minimizing latency and accesses to main memory.

 

Multiple Feature / Performance Options

VersionColor PDL Print Version PerformanceColor Copy PerformanceSingle/Dual CPU
Scanner / AIO
Quatro 4550/600 45+ ppm 30 cpm Dual 600 MHz
Quatro 4550/500 35+ ppm 25 cpm Dual 500 MHz
Quatro 4530/600 30 ppm 30 cpm Single 600 MHz
Quatro 4530/500 25 ppm 25 cpm Single 500 MHz
Quatro 4530/400 20 ppm 20 cpm Single 400 MHz
Printer
Quatro 4545/600 45+ ppm NA Dual 600 MHz
Quatro 4545/500 35+ ppm NA Dual 500 MHz
Quatro 4525/600 30 ppm NA Single 600 MHz
Quatro 4525/500 25 ppm NA Single 500 MHz
Quatro 4525/400 20 ppm NA Single 400 MHz

Development Platform

The programming environment for the 4500 family is based on open source tools such as GNU GCC and GDB. The ARM RealView Development Suite can also be used. To these proven ARM11 core tools Zoran integrates a set of tools for programming the Quatro® DSP—C compiler assembler, linker, simulator, debugger, and libraries. Zoran’s extensive library of optimized image processing algorithms makes developing image processing pipelines easy.

Processing Modules

The 4500 family incorporates the following processing modules:

  • Single-core and dual-core ARM11MP CPU with MMU and FPU, 400-600 MHz (Level 1 and Level 2 caches)
  • 512 KB Level 2 cache
  • Four Quatro DSP cores
  • Dual JBIG compression/decompression cores
  • JPEG assist module
  • AES/SHA-256 hardware encryption modules for IPv6, IPsec
  • Hardware image processing for copy/scan pipelines
  • 1 MB scratchpad memory

Functions of the hardware pipeline include:

Scan Front Processor

  • Shading correction
  • On-the-fl y 1-D lookup
  • Fringing correction
  • White/Black point tracking

Scan Back Processor

  • White/Black point calibration
  • Gamma correction
  • RGB-YCC color conversion

Color Conversion (YCC to RGB to CMYK)

  • YCC-RGB conversion
  • RGB-CMYK conversion
     

    Quatro® Architecture

     

Interface Modules

The 4500 family provides all the interfaces required in an office printer/MFP or document scanner:

  • 400 MHz 32-bit DDR2 SDRAM interface (DDR2-800)
  • USB 2.0 Hi-Speed device interface
  • 2 USB 2.0 Hi-Speed host interfaces
  • Memory card interface
  • Scanner interface supporting LVDS inputs
  • Printer interface for multipass and tandem laser/LED print engines
  • 3 PCI Express interfaces supporting up to 6 total lanes
  • Gigabit Ethernet MAC
  • EIDE interface
  • Anti-counterfeiting interface
  • System bus interface
  • LCD interface
  • 2 SPI interfaces
  • General-purpose I/O interface
  • 2 Serial ports
  • JTAG
     

Quatro® 4500 Controller Block Diagram

 

Key Specifications

  • 520 ball BGA (27x27mm) - 1.0mm pitch
  • Linux OS support
  • 80 nanometer process
  • On-chip PLLs
  • Low-power sleep mode